Silicon Chip Design & Semiconductor Engineering
  • Type Learning
  • Level Advanced
  • Time Months
  • Cost Paid
Additional Details

Silicon Chip Design & Semiconductor Engineering

Issued by UCSC Silicon Valley Extension

The SOC professional in this integrated circuit program is able to use the latest industry tools in hardware specification to Implement Verilog modeling of digital logic, write assertions for formal verification using SystemVerilog, build an advanced UVM verification environment, implement IO technologies such as PCI Express, Ethernet and fibre channel, and complete practical designs with Xilinx FPGAs.

  • Type Learning
  • Level Advanced
  • Time Months
  • Cost Paid
Additional Details

Skills

  • Analog IC Design
  • Circuit Design
  • Design Methodology
  • DFT
  • Digital Logic
  • Fiber Channel
  • Field-Programmable Gate Array (FPGA)
  • Formal Verification
  • Functional Design
  • Integrated Circuit Design
  • Logic Design
  • Object-Oriented Programming (OOP)
  • Physical Design
  • Semiconductor
  • Semiconductors
  • Session Initiation Protocols
  • Silicon Chip
  • SystemVerilog
  • SystemVerilog (Direct Programming Interface)
  • Timing Closure
  • Verilog
  • Vertification

Earning Criteria

  • Completed two of the following courses: Advanced Verification with SystemVerilog OOP Testbench; Analog IC Design, Introduction; Digital Logic Design Using Verilog; Physical Design Flow From Netlist to GDSII; Practical DFT Concepts for ASICs, SoC and SiP; or Analog IC Design, Introduction; as well as at least three elective courses. Met all requirements for a UCSC Silicon Valley Certificate in Silicon Chip Design & Semiconductor Engineering. 14 units.