- Type Validation
- Level Intermediate
Quantus Transistor-Level T3: Extracted View Flows and Advanced Features v21.2 Exam
Issued by
Cadence Design Systems
The earner of this badge can address challenges in advanced node design and extraction, analyze diffusion stretching, ICT File syntax for FinFET process, Quantus-based extraction flows for 3DIC Designs with TSV and Micro-Bumps, evaluate Virtuoso EMIR Flow, where Quantus is effectively integrated with tools like Virtuoso ADE Explorer, Spectre simulators and Voltus-Fi Power Integrity Solution.
- Type Validation
- Level Intermediate
Earning Criteria
-
Score 96% or greater on the exam.