High Level Synthesis Tutorial - DAC 2022
Issued by
Cadence Design Systems
The earner of this badge is a 2021 Design Automation Conference Young Student Fellow who completed the Introduction to High Level Synthesis tutorial. They demonstrated fundamental understanding of machine learning, SystemC, Transaction-Level Modeling, and logic synthesis paradigms. The earner of this badge used that knowledge to implement TensorFlow, Xcellium, Stratus, and Genus towards logic synthesis of a Convolutional Neural Network that serves as an Al Accelerator for Image Recognition.
Earning Criteria
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Earner received the Design Automation Summer School Young Fellow Award and attended an introductory seminar on High Level Synthesis.
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Earner completed the introduction to High Level Synthesis Tutorial, implementing Convolutional Neural Network for Image Detection.
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Earner completed a 20 questions quiz based on the tutorial and earned a 95% or better.